1. Field of the Invention
The present invention relates to overlay management methods and apparatuses, processing apparatuses, measurement apparatuses and exposure apparatuses, device manufacturing systems and device manufacturing methods, and programs and information recording media, and more particularly, to a an overlay management method and an overlay management apparatus that manage overlay of patterns that are formed by transfer so as to be overlaid on an object, a processing apparatus, the measurement apparatus and the exposure apparatus that are equipped with the overlay management apparatus, a device manufacturing system that is equipped with the overlay management apparatus and a device manufacturing method that uses the overlay management method, and a program that makes a computer execute the overlay management method and an information recording medium that records the program.
2. Description of the Background Art
In manufacturing processes of electronic devices (microdevices) such as semiconductor devices and liquid crystal display devices, circuit patterns on a reticle (a mask) are transferred so as to be overlaid to each of a plurality of areas on a semiconductor substrate (a wafer) or a liquid crystal substrate (a glass plate). On this operation, in order to accurately overlay the device patterns with each area on the substrate, images of the device patterns to be transferred and the substrate need to be positioned with high accuracy. Therefore, positioning of a wafer before exposure, which is a so-called wafer alignment, is conventionally performed (e.g. refer to Kokai (Japanese Unexamined Patent Application Publications) No. 61-044429).
In the wafer alignment, for example, wafer marks arranged with each of a plurality of areas that have already been formed on the substrate are photoelectrically detected, and positional information of the marks are detected using a predetermined waveform processing algorithm based on detected mark waveform. Then, based on the detection result of the positional information, a pattern arrangement on the substrate is obtained by a statistical computation, and the pattern positions that are estimated from the pattern arrangement are assumed to be the overlay transfer positions of new patterns. In the wafer alignment, various types of waveform detection processing and computation processing are performed under the processing parameters that set the various types of processing, which are from the measurement of the wafer marks on the substrate up to the computation of the overlay transfer positions of patterns.
In the various types of processing, if the setting value of the processing parameter is not appropriately set, lowering of overlay accuracy is induced as a consequence, and therefore, the setting value of the processing parameter is changed when necessary. In conventional methods, each time when the setting value is changed, the manufacturing process of devices is suspended, and overlay error of the patterns (e.g. resist images) formed on the substrate is measured by performing test exposure and development with a test wafer, and whether or not the parameter thereof is appropriately set is confirmed. Such confirmation takes a lot of time and consumes a lot of costs.